Signal and Systems by Karu Z

By Karu Z

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A data flow is identified by the 32-bit tuple of (source, destination). This facilitates automatic responses and flow control, since an endpoint can simply reverse the tuple to send a packet back to the source. 4. The upper eight bits specify the network switch to which the endpoint is connected, the next four specify to which port on that switch the endpoint is connected, and the lowest four are used within the endpoint as a logical port. By having up to 16 multiple logical ports in a single endpoint, one can differentiate various types or purposes of data, similar to the multiple ports that each GNU Radio block can use.

A CE can be thought of as an independent processing device, and while most will be in FPGAs, it is also possible to create CEs in general purpose processors, GPUs, or anything else which is able to communicate via the RFNoC protocol. The CE will receive some number of streams of packets in and produce a number of output streams. What the user does inside is not constrained, so one could imagine building FFTs, FIR filters, equalizers, AGC state machines, protocol state machines, error-correction codes, and the like.

8). Streaming operations are done through a streamer interface, which allows applications to connect to the sample streams of USRPs through an abstraction layer. UHD takes care of streaming details such as flow control and conversion to a specific data type, which allows the developer to focus on simply passing and receiving sample data from the UHD object. If the user wants to handle samples as complex floating-point types, the streamer object will take care of this, regardless of what type the device uses internally (most devices describe samples as 16-bit integers for each in-phase and quadrature part).

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