LUCAS Associative Array Processor: Design, Programming and by Christer Fernstrom

By Christer Fernstrom

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Extra info for LUCAS Associative Array Processor: Design, Programming and Application Studies

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Which indicates if the Instruction Register has 35 Zero Loopcounter status. * Some/None status from the PEs. 4 Address Processor A 16 bit f i e l d of the m i c r o i n s t r u c t i o n Array= operations performed input/output etc. is used to control the a c t i v i t y in the ALU:s, in the Associative the set-up of the interconnection Since all computations are bit-serial, network, it is i m p o r t a n t that the Control Unit can generate the bit addresses needed at a high rate. For example, to add two fields in the Associative A r r a y (ef.

In spite of thi% SIMD c o m p u t e r to use this n e t w o r k . since it is [Lawrie76]~ [Yew L U C A S is - to our knowledge - the f i r s t o p e r a t i o n a l 49 from MB no. <0 p 6 P 5 P 4 P 3 P 2 P l > - ~ - - - - PE no. from MM no. ---~ PE no. 12 Connections to Data Selectors for the realisation of the Perfect Shuffle+Exchange network. 13. the neighbours These are often used in image processing. One input to the Data Selector is the output f r o m the X-register of the PE.

Logic U n i t (ALU). * A D a t a Selector. * Part of a n e t w o r k that i m p l e m e n t s the SELECT FIRST and SOME functions. Data Select FROM CONTROL UNIT From Common Register SELECT FIRST Part RO- 0 M of SELECT FIRST network 0 From 0 I ntero Connect ion Network o o 0 X 0 Select Chain in Function l S~1 e c t Chain Out ALU co T R / C ----~. 7 A Processing Element. 1 Registers The four registers, The T (Tag) corresponding T, register Memory R, has C, its Module. and X, have slightly d i f f e r e n t features.

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