Designing TSVs for 3D Integrated Circuits by Nauman Khan

By Nauman Khan

This publication explores the demanding situations and provides most sensible innovations for designing Through-Silicon Vias (TSVs) for 3D built-in circuits. It describes a unique strategy to mitigate TSV-induced noise, the GND Plug, that is greater to others tailored from 2-D planar applied sciences, reminiscent of a bottom flooring aircraft and conventional substrate contacts. The ebook additionally investigates, within the kind of a comparative research, the effect of TSV dimension and granularity, spacing of C4 connectors, off-chip energy supply community, shared and committed TSVs, and coaxial TSVs at the caliber of energy supply in three-D ICs. The authors offer targeted top layout practices for designing 3D energy supply networks. due to the fact TSVs occupy silicon real-estate and effect gadget density, this ebook presents 4 iterative algorithms to reduce the variety of TSVs in an influence supply community. not like different current equipment, those algorithms could be utilized in early layout phases whilst in simple terms practical block- point behaviors and a floorplan can be found. ultimately, the authors discover using Carbon Nanotubes for strength grid layout as a futuristic replacement to Copper.

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1 provides an overview of power delivery in 3-D ICs and related work. 2 describes our design setup. TSV size is optimized in Sect. 3. Different comparative studies to find the best TSV granularity are presented in Sect. 4. We study the impact of dedicated TSVs in Sect. 5. Analysis of power delivery using coaxial TSVs is provided in Sect. 6. Design guidelines are presented in Sect. 7. The work is summarized in Sect. 8. N. Khan and S. 1 Problem: Power Delivery for 3-D ICs 3-D integration poses grand power delivery challenges for two reasons: increased power density and package asymmetry.

The proposed method also yields improvement in 3-D PDN vis-a-vis other 3-D PDN configurations. 6 Power Delivery Using Coaxial TSV Coaxial TSVs, as described in Sect. 4, are proposed to eliminate substrate noise by grounding the outer metal layer while the inner metal layer is used for signal transmission. We investigate in this section using coaxial TSVs for power delivery for reducing blockages, increasing decap, and overlaying power/signal routing. 1 Reducing Blockages When power TSVs extend through a die, routing blockages are created in the x-, y-, and z-dimensions.

3-D power grid design studies recommend larger power TSVs (with lower resistance) to reduce voltage drops and to meet current density requirements [46,52]. However, larger TSV sizes directly impact the keep-away area, an area around each TSV where no devices or interconnects can be fabricated. Bart et al. suggest that the keep-away area increases with the increase in TSV area [109]. 4× increase in keep-away area is required. 2 Problem: Power TSV Area 45 Fig. 1 An illustrative 2×2 power grid Fig.

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